Application of In-situ Pre-epi Clean Process for Next Generation Semiconductor Devices

Introduction

Wide band-gap semiconductors show promise of improved performance at high frequencies, high power, and high temperature applications. Silicon Carbide (SiC) and Gallium Nitride (GaN) have shown an increase in uses due to this forward push to wide band-gap semiconductors versus the standard silicon.¹ Silicon Carbide has several properties such as: high electron saturated drift velocity, high thermal conductivity, high electric critical field, oxidative properties, and its chemical inertness, although, SiC has a lower electron mobility than that of Si. GaN on the other hand has a much higher electron mobility but lacks in thermal conductivity.¹

Due to the size limitations of pure SiC wafers and GaN on sapphire as well as their high costs, epitaxial deposition of SiC and GaN on Si is desirable.^1,2 With further reduction of the dimensions of the microelectronic devices into the low nanometer scale, the cleaning procedures play an increasingly important role in the manufacturing of these new generation semiconductor devices. The standard approach for Si surface cleaning prior to epitaxial growth processes is a high temperature, usually greater than 1050^oC, gas phase method to dissolve the native oxide along with any other contaminants on the surface of the wafer in order to prevent formation of any defects.³ However, in the case that an advanced device with sensitive structures requires lower thermal budget treatments, a low-temperature pre-epitaxial cleaning process is needed. However, lowering the process temperature in turn causes an issue by lowering the desorption rate of SiO₂. This issue can be resolved by an HF-last process which converts the surface of the silicon wafer to a hydrogen-terminated surface, which when accomplished properly can yield a hydrophobic surface with the least defects.^3,6,7,8 The pre-epitaxial cleaning of Si wafers for SiC and GaN deposition can be approached in a wet bench at much lower temperatures than the gas phase method. The process chemicals, sequence and number of cleaning steps are becoming more critical in determining the desired end results.^4,5 The following study provides the data and process of proving that a one-step dilute in-situ-HF in the dryer is more effective than a traditional multi-tank HF-last process in a wet bench.⁹

Experimental

All experiments were conducted on Akrion Technologies’ GAMA^TM automated wet station which is capable of performing both a multi-tank sequence and single tank in-situ process. The silicon wafers are processed in the tool for the pre-epitaxial cleaning prior to the epitaxial growth step. Bare silicon wafers were processed with dummy oxide wafers, alternated or sandwiched, in order to simulate a situation with patterned wafers. The contamination levels from the oxide wafers on the bare wafers would be large due to the etch by-products from the oxide wafers depositing onto the bare wafers during processing. Multiple cleaning techniques were used in order to counteract the high level of contamination caused by the etching process. The conventional method consisting of SC1, Rinse, HF, Rinse, Dry was used first to remove any contaminants. Then two different techniques were tested in order to create the cleanest hydrophobic wafer. This consisted of either a surfactant being added to the HF tank or the in-situ HF process in the dryer. The experimental procedure and details of the materials used are shown in Figure 1. The materials used were: a GAMA^TM wet bench equipped with a LuCID^TM dryer (HF controlled injection), KLA-Tencor SurfScan (inspected at ≥ 0.12µm), bare Si wafers with low particle counts and thermal oxide wafers. Concentrations and parameters: 100:1 HF (23^oC), 400:1 dHF (23^oC), 1:2:50 dSC1 (50^oC and 800W megasonic), DIO₃ rinse (~5-10ppm at 23^oC).

Results and Discussion

Surface conditioning has proven to be the critical step in reducing the thermal budget for Silicon epitaxial growth. The typical standard process is to use a high temperature H₂ pre-bake to desorb the native oxide on the wafers to prepare the surface for an epitaxial layer deposition. However, lower temperatures are required to ensure isothermal processing for these advanced next-generation devices.^10,11 In IC manufacturing, wafers are typically mixed with oxide wafers or the wafers are patterned, and exposed silicon is typically adjacent to oxide or nitride areas. When the wafers are exposed to HF solutions, the by-products of the etched wafers will be removed from the hydrophilic surface and be deposited on the hydrophobic surface. This deposition results in high particle counts on the exposed silicon surface. The process contained herein was created to overcome this issue.

Before proceeding with the experimental procedures, tests to ensure particle neutrality within the GAMA^TM wet bench were performed. The results of a conventional HF/Rinse/SC1/Rinse/Dry process yielded low particle addition even in the presence of oxide wafers; i.e. an average particle addition of – 6 (1 s Stdev = 11, Figure 2). When only using bare silicon wafers, the conventional HF-last process yielded low particle addition as well; i.e. the average particle addition less than 40 particles at 0.12 mm (Figure 3). In addition, post epitaxial defects were also low (~ 1.26 defects/cm²), as shown in Figure 4.

Here silicon wafers were sandwiched between oxide filler wafers in order to simulate patterned wafers in a typical manufacturing environment. A conventional HF-last process (SC1/Rinse/HF/Rinse/Dry) resulted in high particle counts at 0.12µm (> 1,000). The high pre-epitaxial particle counts also caused high post-epitaxial defects (>30,000). The particulate defects are normally considered as nucleation sites of epitaxial defects during the epitaxial deposition process. Conventional methods of wafer transfer between tanks plays a significant role in increasing the deposition of silicate particles onto the silicon surface due to wafers crossing the liquid-to-air interface. To counteract the silicate deposition, two different approaches were tested.

The first tested method was to add a surfactant to the HF solution in the bath in order to improve the wettability of the wafers to reduce the particle adhesion. The process results proved to be slightly better than that of the conventional HF-last method. However, the presence of the surfactant on wafer surfaces in any trace amounts became problematic for the epitaxial growth process. In order to remove the surfactant, an additional step would be required in the process, e.g. ozone. Therefore, a new process to eliminate the use of the surfactant is desired. An in-situ process was thus developed in order to prevent the wafers from crossing the liquid-to-air interface in which the contaminants reside and deposit onto the wafer surface. HF chemical injection was used in the dryer to perform the in-situ process which yielded much lower particle deposition due to not crossing the liquid-to-air interface. Figures 5 and 6 show the results that the average particle adder of less than 50 particles.

An important note is that the use of ozonated rinse after HF and before going to the SC1 step is very critical in eliminating any potential for metal-induced pitting on the hydrophobic surface.¹² As reported by Knotter, Fe in the SC1 can induce pitting on hydrophobic wafer surface. The oxide chemically grown in the ozonated rinse is stable and thick enough (7-10 Å, as shown in Figure 7) to protect the silicon surface from any effects of metal roughening. The post epitaxial cleaning results for the in-situ method are shown in Figure 8, and the average LPD density per wafer is about 0.89 defects/cm². Figure 8 also indicates that the lower the HF-last defects is, the lower the post epitaxial deposition defects would be.

The results of each of the different cleaning recipes are summarized in Table 1. Different types of filler wafers were also used, i.e. polymer and nitride, to investigate if the filler wafer type would have any negative impact on the results. The results from testing showed that the most critical step in order to achieve extremely low post epitaxial deposition defects is the in-situ process which requires no wafer transfer between steps. In order to characterize the background oxide thickness, measurements were also taken as a measure of the oxygen content on the wafer surface. It is equally important to notice that the amount of oxygen present on the wafer surface could significantly increase the number of post-epitaxial defects on the wafer. The lower the oxygen content presents on an H-passivated surface, the lower amount of post-epitaxial defects is observed on the wafer surface, as shown in Figure 9.

Conclusions

With the increase in use of epitaxial materials such as GaN and SiC deposited on Si, an efficient pre-epitaxial cleaning resulting in low particle addition is necessary. An in-situ cleaning process in the dryer was developed and used for pre-epitaxial growth. Results for the in-situ cleaning showed a significant improvement over the standard HF-last process. The reason for the in-situ process having a great impact on the elimination of particle deposition is due to the Si wafers not crossing the liquid-to-air surface between the etch, rinse, dry process. The experiments conducted in the study proved that the use of dilute chemicals and the in-situ HF, rinse, dry process yield lower defects than that of the standard multi-tank HF-last process. The lower defects after the pre-epitaxial clean (post-clean) are reflected on the epitaxial growth yielding lower defects after the product deposition.

References

1. Microsemi, Gallium Nitride (GaN) versus Silicon Carbide (SiC)In The High Frequency (RF) and Power Switching Applications
2. Golecki, I., et al., Appl. Phys. Let., Vol. 60 (1992) pp. 1703-1705.
3. Caymax, M. et. al, Solid State Phenomena Vols. 65-66 (1999) pp. 237-240, 1999 Scitec Publications, Switzerland.
4. Besson, P. et al, UCPSS ‘2000, Vols. 76-77 (2001) pp. 199-202.
5. Kashkoush, I., et al., Mat. Res. Soc. Symp. Proc., Vol. 477, 1997, pp. 311-316.
6. Golecki, I., et. al., Appl. Phys. Lett., Vol. 69 (1992) p. 1730.
7. Fissel, A., et. al., Appl. Phys. Lett., Vol. 66 (1995), p. 3182.
8. Patruno, P., Fleury, A., Andre, E., and Tardif, F., UCPSS ’94 Proc., pp. 247-250.
9. Kashkoush, I., et al., Elec. Soc. Clean. Symp. Proc., Vol. 26, 2001, pp. 345-351.
10. Mouche, M., et al, UCPSS ’96 Proc. Pp 269-272.
11. Verhaverbeke, S and Pagliaro, B., Electrochem Soc. Proc. Vol. 99-36, pp. 445-451.
12. Knotter, M. and Dumensil, Y., UCPSS ‘2000, Vols. 76-77 (2001) pp. 255-258.