Low Consumption Front End Of the Line Cleaning : LC-FEOL

P.Besson(1), C.Cowache (3), J.M.Fabbri(2), F.Tardif(2) and A.Beverina (1)

  1. STMicroelectronics, 850 rue Jean Monnet, 38921 Crolles, France
  2. GRESSI-LETI, (CEA Grenoble), 17 rue des Martyrs, 38054 Grenoble Cedex 09, France
  3. Akrion, 6330 Hedgewood 150-Allentown PA 18106, USA

This work has been carried out within the GRESSI consortium between CEA-LETI and France Telecom CNET

Abstract

This article presents the Low Consumption Front End Of the Line cleaning: LC-FEOL, which addresses technical constraints imposed by SOI and advanced CMOS technologies. These technologies require low silicon and oxide consumption with the same or higher performance levels in terms of particle and metal removal efficiency as standard cleanings. The LC-FEOL cleaning uses ultra dilute SC1 and HF chemistries combined with megasonic energy as basic cleaning mechanism and respects the general environmental tendencies by drastically reducing the amount of chemical products that are used.

Introduction

Next generation device characteristics will require full control on the silicon and oxide etched thickness during each process step. In fully depleted SOI technology, final silicon vertical dimensions are around 200Å and in advanced CMOS technology, the S/D junction depth will decrease to 200 Å for the 0,07 µm technology node(1). For these reasons the silicon consumption of several cleaning steps needs to be minimized and perfectly controlled. At the same time an efficient cleaning process addressing these issues will also have to take into account some critical steps where oxide layers are used as spacer, spacer under-layer or on dual gate structures. For the above mentioned reasons, a zero silicon and oxide consumption cleaning process would be ideal. The first step to achieve is: <1 and <2 nm etched for Si and SiO2 respectively. Our studies focus on obtaining a very low silicon and oxide consumption with high repeatability, whilst having the same or better cleaning performances than the processes of record available at LETI: dRCA(2), Advanced Front End Of the Line(2) (AFEOL) or Diluted Dynamic Clean(3) (DDC).

Experimental

All processes are performed in an AKrion GAMA 1 wet bench on 200mm, CZ, p-type, 7-10 ohms.cm wafers. The SC1 chemistry is performed at 65°C in a quartz tank which is re-circulated, filtered and equipped with an ICETM chemical control system and a water coupled 1600W megasonic ( 3W/cm² ) operating at a frequency of 1 MHz. The HF chemistry is performed in a standard PVDF tank re- circulated and filtered with HCl injection. The rinse tank (PVDF construction) with gaseous O3 and HCl injection uses a megasonic array MSA 2538BTM from Techsonic (Antibes, Fr) which provides an acoustic activation of 1000W operating at a frequency of 1,8 MHz (this module covers half of the bath surface). A Semichem 4102TM from FPM is used to perform in-line analysis of reactant concentrations, tune the chemistries regulation system and optimize bath lifetime. Silicon On Insulator (SOI) and thermally oxidized wafers are used to determine etch rates; thickness measurements are performed on a Tencor SE1280 UV ellipsometer. All particle measurements are performed at 0.16µm on a Tencor SFS 6200. The contaminated wafers are obtained by dipping them in a DI water tank where commercially available calibrated particles are previously dispersed, after which they are spin dried. Various kinds of particles (Al2O3, SiO2 and Si3N4) are separately used for contamination. The wafer surface roughness is analyzed by means of Atomic Force Microscopy (Nanoscope III from Digital Instruments); RMS roughness is recorded from several scans in tapping mode.

Background

The LC-FEOL clean is detailed in Table 1. This process is an evolution of the AFEOL process that was presented earlier. The AFEOL clean combines the benefits from both standard RCA and DDC processes, but unfortunately also inherited their main disadvantage: a relatively high silicon and oxide consumption. Considering the SC1 step for optimisation, it is clear that the use of megasonic energy allows to further dilute from standard ratios. These still have too high silicon etch rates due to the low variations on NH4OH/H2O2 ratios (0,1-1) that are generally used. We studied the influence of a drastic decrease in NH4OH concentration at a constant ratio (1/20) of H2O2/DI Water. For the HF chemistry, the oxide consumption could be considered as the intrinsic weakness. The influence of the HF dilution is therefore studied in combination with the use of a Direct Coupled Megasonic module in the HCl/O3 rinse tank.

Results

1° Etch rate

As expected and shown in Figure 1, when the ammonia concentration is decreased the SC1 etch rate decreases on both types of surfaces. As such we were able to reduce the Si and SiO2 consumed by a factor 5.5 and 4 respectively from 0.25/1/20 to 0.012/1/20. At the 0.012/1/20 ratio ([NH4OH]= 4.45E-03 mol/l) the etch rate values are still repeatable and the chemical concentration can be effectively controlled, therefore it can be implemented as an industrial process.

For the HF chemistry, the thermal oxide etch rate is voluntarily adjusted to 12 Å/min corresponding to [HF]=0.14mol/l (0.25% vol). The [HCl] is maintained at 0.27mol/l (1% vol). This etch rate removes any chemical oxide(4) within an arbitrary time of 1min which represents an etched thickness around 15Å (this includes the robot transfer time). This HF bath dilution does not change the total silicon consumption.

Particle Removal Efficiency (P.R.E.)

With the 0.25/1/20 SC1 solution ([NH4OH]=9.73E-02mol/l) as the reference, the diminution in ammonia concentration only has a minor effect on the particle removal (Fig.2). In fact, for diluted solutions the acoustic activation is of prime importance for the removal mechanism. Only the pH moving towards the neutral point determines the yield loss as observed for nitride particles. Under the same conditions but without megasonic activation the particle removal efficiency drops under 50% for 0.25/1/20 SC1 and even stays below 5% for 0.012/1/20 SC1.

Fig.1: SC1 Etch Rate dependence on NH4OH conc.

Fig.2: SC1 P.R.E. dependence on NH4OH conc.

For HF chemistries, the use of a high frequency megasonic module during the subsequent rinse step guarantees very good P.R.E. levels. This explains the minimal influence of the HF concentration on the

P.R.E. for the different DDC processes (Fig. 3). Moreover, as shown in Figure 4, the etch rate reduction has a beneficial impact on the Holy Grail(4) effect. In this experiment bare silicon wafers and oxidized wafers are alternated in the slots of the carrier. Added particles are measured after a HF x%/HCl 1% step with the same oxide consumption target of 15Å, followed by a 10 min rinse step (3min HCl only, followed by 7min HCl and 6ppm O3). The results clearly show the dependence of the adders in function of the HF concentration. This effect could be attributed to the lower density of etched species in the carry over layer on hydrophilic wafers with more diluted HF solutions.

Fig.3: P.R.E. DDC with various HF conc. and Rinse O3&HCl only with 1.8MHz meg.

Fig.4: Holy grail effect: Added Particles on bare silicon wafers for various HF conc.

We can clearly reduce silicon and oxide consumption for the separate SC1 and HF steps with respectable P.R.E. for both chemistries. However, as shown in Figure 5 the particle removal efficiency by combining both steps, as in the LC-FEOL, is higher than for the standard cleans. An aggressive robustness test (Fig.6) of 3 successive runs, each consisting of 25 contaminated Al2O3 or Si3N4 wafers, results in a mean P.R.E. of 98,5%. This performance could be attributed to the dual megasonic steps.

Fig.5: LC-FEOL clean P.R.E. on bare Si wafers and oxidized wafers.

Fig.6: LC-FEOL P.R.E. robustness test.

Metal Removal Efficiency (M.R.E.)

The M.R.E. shown in Figure 7 for different cleanings indicates the ability of the LC-FEOL clean to eliminate initial contamination levels of around 1012 at/cm². The 1min HF 0,2% immersion time is sufficient to obtain the same performance as the standard dRCA with 10 min SC2 at 65°C or the DDC with the dual HF steps. The necessity of this short HF step for the M.R.E. is also demonstrated by the results obtained with 0.012/1/20 SC1 and/or HCl/O3 rinse step.

Roughness

The difference in silicon surface roughness (RMS) between a 0.25/1/20 (0.23 nm +/-0.02) and a 0.012/1/20 SC1 (0.21 nm +/-0.02) is negligible. With these processes it is however not possible to obtain the same low RMS level as for the HF based chemistry (0.16 nm +/-0.01).

Electrical data

A comparative electrical test performed on 70Å gate oxide structures is done with dRCA and LC-FEOL cleaning splits before gate oxidation. The cumulative failure of Charge to Breakdown measurements are shown in Figure 8. There is no significant variation between the two different Qbd distribution splits.

Fig.7: Fe Removal Efficiency in function of cleaning process measured by VPD-ICP MS.

Fig.8: Qbd distribution of 70Å gate oxide structures.74 dies/wafer; 4 wafers/split lot

Concentration control

Last critical point concerns the concentration control of the very diluted SC1. The ammonia concentration needs to be tightly controlled to turn the zeta-potential in an electrostatic repulsion state. The parameters of the conductivity control ICETM on the GAMA1 wet bench were optimized by use of an in-line monitor system with an ammonia ion specific electrode (ISE) and Oxidant Reduction Probe (ORP). The ability to properly control this low ammonia concentration is clearly demonstrated in Figure 9.

Discussion

Fig.9: SC1 Ammonia concentration control

Based on standard chemistries the LC-FEOL process proves that excellent P.R.E. can be obtained and this with minimal Si and SiO2 under-etching. The lack of under-etching is compensated by the use of megasonic energy in both SC1 and HCl/O3 final rinse steps. Particularly the results provided by the 1.8 MHz frequency megasonic module are very interesting. It could be the next step towards a “zero consumption cleaning”.

An ozone step is introduced at the start of the sequence to remove organics as the ability of the 0.012/1/20 SC1 is still not demonstrated on this type of contamination. The use of a low concentration HF bath coupled with a fixed target of etched oxide minimizes the holy grail effect and allows to improve M.R.E. over rinse HCL/O3 cleaning sequence.

Conclusions

Focusing on the reduction of both Si and SiO2 consumption during the pre-diffusion cleaning process, a new sequence is introduced : LC-FEOL. Easy to implement in a conventional wet bench, this recipe is a very interesting alternative for standard dRCA and O3/HF based chemistries. Based on the consumption results (6Å for Si and 16Å for SiO2) it would be interesting to work further towards reducing the oxide consumption, this by using even more diluted HF chemistries.

References

  • The International Technical Roadmap for Semiconductors, 1999
  • Cowache et al., ECS 1999, Hawaii, abstract n°1104
  • Tardif et al., UCPSS 1998, Oostende, Belgium
  • Paillet et al., ECS 1996, Chicago, abstract n°481
  • Bellandi et al., UCPSS 1998, Oostende, Belgium